As is well understood in the art, manufacture of IC circuitry involves building up layers of different materials (and sometimes implanting different species) on a wafer to form circuit features. Part of the process of forming each circuit layer involves coating the wafer with a layer of light-sensitive resist material and exposing each chip area with an image of a circuit pattern for the layer. As is well understood, this is process is carried out using a microlithography machine in which a reticle or mask containing a pattern corresponding to a circuit pattern for an IC layer is illuminated, and a projection optical system projects an image of the illuminated mask pattern onto the resist layer of the wafer. A number of masks are necessary for the manufacture of a single IC.
Accurate creation of a mask for the microlithography machine from design drawings of the mask is critical to this process. Typically, in order to create a masks from design drawings, a database that defines layers (different from physical IC layers) and data types on each layer is used. Generally, the database includes a plurality of layers each of which includes at least one, and typically more than one, data type. A single data type of a layer generally indicates one or more shapes and locations of those shapes on a two dimensional grid. In generation of a mask from the database, the location (or locations) of the shape (or shapes) associated with a particular data type are translated to a location of the shape (or shapes) on the mask. Typically, a database is populated with enough layer and data type data to generate all of the masks necessary for the manufacture of a single IC (or a family of ICs sharing similar characteristics). An algorithm is then written that transforms the layers and data types from the database into the masks necessary to create an IC. Typically, a single algorithm is written for each mask that is required for the manufacture of a single IC. The Algorithms typically involve a Boolean function on the multiple drawn layer to create a mask, and can also involve a sizing to either reduce some critical dimension or removing slivers (sub-design rule features).
After a particular mask or set of masks is generated using the database and generation algorithms, the mask or masks must be checked against the original design drawings to insure accuracy of the generated masks. This is typically done by starting with a transformation in one of the algorithms, locating in the original drawing the shape that the particular transformation is to generate in the associated mask, finding the shape in the generated mask, and checking, based on the original drawing, that it is of appropriate size and shape. This checking is not done on all the polygons in the database but just some from each of the layer/data type combinations such that all the algorithms used in the database to mask transformation are verified. This task is typically performed manually. And, as smaller and more numerous electrical devices are placed on ICs, masks for manufacturing the ICs become larger and more complex, increasing the burden of this checking task and in most cases not resulting in 100% verification of the algorithms. Such checking can require days or weeks to complete in a typical manufacturing environment. Accordingly, a more efficient method for checking the accuracy of masks for the manufacture of an IC is needed.